MIPSers: MIPS extension release 6 simulator

College

College of Computer Studies

Department/Unit

Computer Technology

Document Type

Conference Proceeding

Source Title

Proceedings of the IEEE National Aerospace Electronics Conference, NAECON

Volume

2017-June

First Page

217

Last Page

223

Publication Date

7-2-2017

Abstract

MIPSers is a simulator based on the current Release 6 version of Microprocessor without Interlocked Pipeline Stages (MIPS). Currently, there are no existing MIPS simulators that support MIPS Release 6. Hence, MIPSers is the only simulator that can demonstrate the major changes in the instruction set such as branch without branch delay slots, multiplication and division without the use of HI/LO registers, selection operations, floating point comparison and bit swap operations. Users can use this tool to visualize the new introductions made by Imagination Technologies in MIPS Architecture. The design and performance of the simulator was assessed through manual verification and comparisons with other simulators. © 2017 IEEE.

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Digitial Object Identifier (DOI)

10.1109/NAECON.2017.8268773

Disciplines

Computer Sciences

Keywords

Computer architecture; Assembly languages (Electronic computers); Computer simulation

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