MIPSers: MIPS extension release 6 simulator
College
College of Computer Studies
Department/Unit
Computer Technology
Document Type
Conference Proceeding
Source Title
HNICEM 2017 - 9th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management
Volume
2018-January
First Page
1
Last Page
6
Publication Date
7-2-2017
Abstract
MIPSers is a simulator based on the current Release 6 version of Microprocessor without Interlocked Pipeline Stages (MIPS). Currently, there are no existing MIPS simulators that support MIPS Release 6. Hence, MIPSers is the only simulator that can demonstrate the major changes in the instruction set such as branch without branch delay slots, multiplication and division without the use of HI/LO registers, selection operations, floating point comparison and bit swap operations. Users can use this tool to visualize the new introductions made by Imagination Technologies in MIPS Architecture. The design and performance of the simulator was assessed through manual verification and comparisons with other simulators. © 2017 IEEE.
html
Digitial Object Identifier (DOI)
10.1109/HNICEM.2017.8269447
Recommended Citation
Kho, N. D., & Uy, R. (2017). MIPSers: MIPS extension release 6 simulator. HNICEM 2017 - 9th International Conference on Humanoid, Nanotechnology, Information Technology, Communication and Control, Environment and Management, 2018-January, 1-6. https://doi.org/10.1109/HNICEM.2017.8269447
Disciplines
Computer Sciences
Keywords
Computer architecture; Assembly languages (Electronic computers); Computer simulation
Upload File
wf_no