FPGA implementation of an indoor broadband power line channel emulator

College

Gokongwei College of Engineering

Department/Unit

Electronics And Communications Engg

Document Type

Conference Proceeding

Source Title

Proceedings of KICS-IEEE International Conference on Information and Communications with Samsung LTE and 5G Special Workshop, ICIC 2017

First Page

218

Last Page

223

Publication Date

8-3-2017

Abstract

Power line communication is an emerging technology in the field of communications that aims to use the power line as a medium to send and receive data. Several studies have been conducted to characterize the power lines [1], [2], [3], [4],. These studies guide PLC modem designers to create a more robust design. However, it is not practicable to test modems in a live power line network. This research aims to create an emulator capable of replicating the behavior of a typical indoor power line channel and use it as a test bed for PLC modem The emulator is implemented on Virtex 6 FPGA and FMC 151 for the analog front end. The power line channel model uses Zimmerman's channel transfer function [5] as reference. Analysis are done by comparing theoretical results with the hardware results which are done in MATLAB and Xilinx respectively. Several features such as addition of noise are also within the emulator and can be selected by the user to improve the realism of the emulator. Lastly, channel parameters such as SNR (signal to noise ratio) and RMS (root mean square) delay spread are obtained to ensure the quality of the channel produced. © 2017 IEEE.

html

Digitial Object Identifier (DOI)

10.1109/INFOC.2017.8001678

Disciplines

Electrical and Electronics | Systems and Communications

Keywords

Broadband communication systems; Field programmable gate arrays

Upload File

wf_yes

This document is currently not available here.

Share

COinS