A four-bit serial-in-parallel-out (SIPO) integrated circuit VLSI module design using circad II

Authors

Sammy T. Que, De La Salle University, Manila
Gil Castillo, De La Salle University, Manila
Rommel Trinidad, De La Salle University, Manila

Document Type

Article

Source Title

Engineering Journal

Volume

6

Issue

1

First Page

45

Last Page

53

Publication Date

5-1989

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Recommended Citation

Que, S. T., Castillo, G., & Trinidad, R. (1989). A four-bit serial-in-parallel-out (SIPO) integrated circuit VLSI module design using circad II. Engineering Journal, 6 (1), 45-53. Retrieved from https://animorepository.dlsu.edu.ph/faculty_research/10011

Shelf Location

Archives, The Learning Commons, 12F, Henry Sy Sr. Hall

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