Indoor broadband power line channel emulator using FPGA with log normal distribution

Date of Publication

2016

Document Type

Bachelor's Thesis

Degree Name

Bachelor of Science in Electronics and Communications Engineering

Subject Categories

Engineering

College

Gokongwei College of Engineering

Department/Unit

Electronics and Communications Engineering

Thesis Adviser

Ann E. Dulay

Defense Panel Member

Aaron Don M. Africa

Gerino P. Mappatao

Abstract/Summary

Powerline communication is a communication technology that uses the powerline to send or receive data. The research was developed to provide a deeper understanding about the environment of the powerline channel. Thus, the researchers developed a broadband powerline channel emulator that can emulate the behavior and characteristics of the power line. This research aims to implement the indoor broadband power-line channel emulator on a field programmable gate array (FPGA). In addition, the study uses Zimmermann's channel model as its transfer function. Through the hardware implementation, the researchers were able to obtain the signal that was being sent at the input, except that the magnitude of the output was much smaller due to the injection of noise and the incorporation of the transfer function. The analysis of noise and transfer function were done through MATLAB and XILINX simulations. Through these simulations, the researchers were able to obtain the root mean square (RMS) delay spread and compare the delay between the software simulation and hardware implementation. Also, the signal-to-noise ratio (SNR) of the system was also obtained through the use of the R3131A Advantest Spectrum Analyzer.

Abstract Format

html

Language

English

Format

Print

Accession Number

TU21519

Shelf Location

Archives, The Learning Commons, 12F, Henry Sy Sr. Hall

Physical Description

xviii, 188 leaves : colored illustrations ; 28 cm.

Keywords

Broadband communication systems; Telecommunication systems; Electric lines--Carrier transmission; Field programmable gate arrays; Lognormal distribution

This document is currently not available here.

Share

COinS