FPGA-based object detection and classification of an image

Date of Publication

2017

Document Type

Bachelor's Thesis

Degree Name

Bachelor of Science in Electronics and Communications Engineering

Subject Categories

Electrical and Electronics | Systems and Communications

College

Gokongwei College of Engineering

Department/Unit

Electronics and Communications Engineering

Thesis Adviser

Cesar A. Llorenta

Defense Panel Chair

Roderick Y. Yap

Defense Panel Member

Alexander C. Abad
Ann E. Dulay

Abstract/Summary

The purpose of this project is to develop a standalone system that uses an FPGA to realize an image processing platform that detect objects in image and classify them. The target FPGA board is the zedboard as it is one of the high-end devices available that can support the requirements of the study. SIFT, BoF, and SVM algorithms used in object detection and classification, will be implemented to run the embedded system implementable on the zedboard. The project aims to provide an FPGA-based platform in implementing and testing of image processing algorithms for real-time performance. Xilinx Vivado design tools will be used to implement the embedded system. Ubuntu filesystem will be implemented to run as the operating system of the FPGA. OpenCV library will be installed on this platform to run the image processing algorithms. Dataset containing the images to be detected and classified will be created as the training set and test set. Training set include images containing objects for detection and classification. These include bags, books and luggage that are carried by a human object in the image. Classified objects will be outputted in an HDMI monitor and through a serial UART port. The operation of the algorithms show that Ubuntu OS along with an OpenCV library is successfully implemented and working on the system. Result shows that the SIFT, BoF, and SVM algorithms are successfully executed on the embedded system on the zedboard.

Abstract Format

html

Language

English

Format

Print

Shelf Location

Archives, The Learning Commons, 12F, Henry Sy Sr. Hall

Physical Description

xiii, 133 leaves, illustrations (some color), 28 cm.

Keywords

Field programmable gate arrays; Image processing

Embargo Period

5-13-2021

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