Design, characterization and implementation of a fourth-order tunable switched capacitor low pass filter on a 0.25o CMOS process
Date of Publication
2012
Document Type
Bachelor's Thesis
Degree Name
Bachelor of Science in Electronics and Communications Engineering
College
Gokongwei College of Engineering
Department/Unit
Electronics and Communications Engineering
Thesis Adviser
Ann E. Dulay
Defense Panel Chair
Alexander C. Abad
Defense Panel Member
Roderick Yao Yap
Gerald P. Arada
Abstract/Summary
Signals in the real world contain both its wanted and unwanted information. All electronic design projects gives off signals that require electronic signal filtering, processing or amplification, from the simple gain up until to the very complex digital-signal processing. This is the main importance of electronic filters to remove the unwanted frequency components from the signal and to enhance the wanted frequency components to produce an output with lesser noise.
The thesis project will be a fourth order low pass switched-capacitor. The proposed design will result to a tunable low pass output integrated in a single circuit. The target signal-to-noise (SNR) ratio will be 60dB and its operating frequency will range from 0Hz-30 kHz having a clock frequency ranging from 10Hz - 1.2 MHz. Also, the considered slew rate for this project will be rated as 3 volts per microsecond. The group will be using Tanner 0.25 micron CMOS technology for its implementation.
Abstract Format
html
Language
English
Format
Accession Number
TU16875
Shelf Location
Archives, The Learning Commons, 12F, Henry Sy Sr. Hall
Physical Description
130 [40] leaves: ill.(some col.) 28 cm
Recommended Citation
Belnas, R. O., Dela Rosa, R. G., Locsin, A. F., & Montallana, M. A. (2012). Design, characterization and implementation of a fourth-order tunable switched capacitor low pass filter on a 0.25o CMOS process. Retrieved from https://animorepository.dlsu.edu.ph/etd_bachelors/14813
