DLS565: Design and characterization of a phase locked loop using 0.5um technology
Date of Publication
2014
Document Type
Bachelor's Thesis
Degree Name
Bachelor of Science in Electronics and Communications Engineering
Subject Categories
Engineering
College
Gokongwei College of Engineering
Department/Unit
Electronics and Communications Engineering
Thesis Adviser
Alexander C. Abad
Defense Panel Chair
Roderick Yap
Defense Panel Member
Ann E. Dulay
Donabel D.V. Abuan
Abstract Format
html
Language
English
Format
Accession Number
TU18742
Shelf Location
Archives, The Learning Commons, 12F, Henry Sy Sr. Hall
Physical Description
i,270 leaves : illustrations (some colored) ; 28 cm.
Recommended Citation
Atendido, K. C., Co, J. C., Garcia, P. H., & Navarro, G. B. (2014). DLS565: Design and characterization of a phase locked loop using 0.5um technology. Retrieved from https://animorepository.dlsu.edu.ph/etd_bachelors/13333
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