Adaptive road traffic control system using field-programmable gate arrays (FPGA)
Date of Publication
1999
Document Type
Bachelor's Thesis
Degree Name
Bachelor of Science in Electronics and Communications Engineering
College
Gokongwei College of Engineering
Department/Unit
Electronics and Communications Engineering
Abstract/Summary
This thesis presents an efficient system for controlling road traffic. This was inspired by a previous thesis also aiming to solve the traffic problem in the metropolis. The previous system used a personal computer (PC) and software for traffic-load control of an isolated intersection.
Instead of a PC and software, the system presented here is based on hardware, particularly the field-programmable gate array or FPGA. As in the previous thesis, input data to be fed to the controller will come from proximity sensors positioned strategically along an intersection. The algorithm used is similar to that of the previous thesis and still considers the concepts of traffic engineering.
In the event of a clogged stream, the system is expected to halt that particular stream and give other streams, which are unclogged, a go signal. On the other hand, when the presence of vehicles is detected, the system is expected to give that stream with presence a go signal.
To assess the efficiency and effectiveness of the system, a scaled-down model depicting an intersection in the metropolis is used and actual road conditions are simulated.
Abstract Format
html
Language
English
Format
Accession Number
TU09302
Shelf Location
Archives, The Learning Commons, 12F, Henry Sy Sr. Hall
Physical Description
99 numb. leaves ; Computer print-out.
Recommended Citation
Araneta, J. E., Cruz, P. D., Flores, R. B., Guillen, H. P., & Pestano, C. T. (1999). Adaptive road traffic control system using field-programmable gate arrays (FPGA). Retrieved from https://animorepository.dlsu.edu.ph/etd_bachelors/10905
