FPGA based trellis coded modulation encoder.
Date of Publication
2000
Document Type
Bachelor's Thesis
Degree Name
Bachelor of Science in Electronics and Communications Engineering
Subject Categories
Electrical and Electronics
College
Gokongwei College of Engineering
Department/Unit
Electronics and Communications Engineering
Abstract/Summary
Error detection and correction is very important during the transfer of data. The process of detecting and correcting the error should be fast and accurate. Trellis Coded Modulation is capable of detecting and correcting corrupted signals without retransmission. The transmitter and receiver for TCM are programmed to understand the allowable bit patterns and transitions. When the receiver is unable to recognize the transmitted signal, it analyzes and compares the current bit patterns to the previous bit patterns and makes decisions as to the most relevant state. With this, the corrupted bit signals are reconstructed.
The essential parts of a V.33 modem are its convolutional encoder and decoder. The encoder should be able to transmit the signal according to the Trellis Rules for Coding. The decoding process should be able to recognize the bit pattern being transmitted and be able to remodel the corrupted data bits. In order for the convolutional encoder/decoder to be implemented. VHDL will be utilized.
Abstract Format
html
Language
English
Format
Accession Number
TU09598
Shelf Location
Archives, The Learning Commons, 12F, Henry Sy Sr. Hall
Physical Description
84 numb. leaves ; Computer print-out.
Keywords
Error-correcting codes (Information theory); Trellis-coded modulation.
Recommended Citation
Caoile, R., Dee, R., Dorado, R., Lim, H., & Mendoza, L. (2000). FPGA based trellis coded modulation encoder.. Retrieved from https://animorepository.dlsu.edu.ph/etd_bachelors/10233
