Date of Publication
Master of Science in Electronics and Communications Engineering
Electrical and Computer Engineering | Electrical and Electronics
Gokongwei College of Engineering
Electronics And Communications Engg
Defense Panel Chair
Cesar A. Llorente
Defense Panel Member
Hash is one of the techniques used for message security and confirming message authenticity. This paper introduces a new one-way hash function based on non-linear maps from closed-loop tandems of digital to analog converters to improve its performance. Comparison of the proposed algorithm with the existing SHA-1 with input from the same NDAC map will be made. The proposed algorithm is implemented using a field-programmable gate array. The algorithm proves to have good diffusion and confusion characteristics that substantial changes can be found in the resulting hash value even if only one bit is changed in the message. Theoretic analyses and numeric simulations have demonstrated that the proposed algorithm possesses high sensitivity, high collision resistance and stability. In this paper, the comparison made by the author to SHA-1 and its proposed algorithm was based on the fact that both have inputs coming from the Nonlinear Digital-to-Analog Converter map and not with the SHA-1 algorithm alone. Also, we must take into consideration the difference in the results due to the difference of bits used by SHA-1 which is 160 bits while the proposed algorithm was only 64 bits. The creation of SHA-1 involves complex mathematical equation unlike the proposed algorithm. The results show that the combination of the NDAC map with the OWHF can be used instead of SHA-1.
Archives, The Learning Commons, 12F Henry Sy Sr. Hall
xi, 95 leaves, 4 3/4 in.
Hashing (Computer science); Digital-to-analog converters; Field programmable gate arrays
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Virtudez, K. A. (2013). FPGA implementation of a one-way hash function utilizing HL11-1111 nonlinear digital to analog converter map. Retrieved from https://animorepository.dlsu.edu.ph/etd_masteral/4523