Date of Publication

2-2011

Document Type

Master's Thesis

Degree Name

Master of Science in Electronics and Communications Engineering

Subject Categories

Electrical and Electronics

College

Gokongwei College of Engineering

Department/Unit

Electronics And Communications Engg

Thesis Adviser

Roderick Yap

Defense Panel Chair

Ann Dulay

Defense Panel Member

Cesar Llorente
Jose Antonio Catalan

Abstract/Summary

This study focused on the design and characterization of a 10-bit Delta-Sigma Analogto- Digital Converter (DS-ADC) that can operate at 1.5V supply using 0.35um technology that is normally intended to work at 3.3V. The design has an oversampling ratio (OSR) of 128, a signal bandwidth of 4 KHz, which covers the human voice bandwidth, and a maximum sampling frequency of 1.024 MHz. The design is composed of a 1st Order Delta-Sigma Modulator and a 2nd Order Cascaded Integrator Comb (CIC) decimation filter as its digital signal processor (DSP). The DS-ADC was designed, characterized and implemented using Tanner tools and LTSpice tool.

Abstract Format

html

Language

English

Format

Electronic

Electronic File Format

MS WORD

Accession Number

CDTG004883

Shelf Location

Archives, The Learning Commons, 12F Henry Sy Sr. Hall

Physical Description

1 computer optical disc. ; 4 3/4 in.

Keywords

Analog-to-digital converters

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