Date of Publication
Master of Engineering major in Electronics and Communications Engineering
Electronic Devices and Semiconductor Manufacturing
Gokongwei College of Engineering
Electronics And Communications Engg
Roderick Y. Yap
Defense Panel Chair
Lyne R. Palomar
Defense Panel Member
This practicum project focuses on the minimization of very large system integration (VLSI) test execution times for improving production-mode electrical screening of custom integrated circuits without sacrificing quality. The reduction of test time leads to maximizing profits and minimizing costs. The project aims to fully analyze the Trillium test programs and evaluate its impact on the test execution time and to find out whether or not it has benefit to the company.
Archives, The Learning Commons, 12F Henry Sy Sr. Hall
52 numb. leaves, 28 cm.
Integrated circuits--Very large scale integration; Transputers; Systolic array circuits; Semiconductor industry
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Manongdo, I. (1998). An analysis of a VLSI test software speed optimization methods for semiconductor manufacturing. Retrieved from https://animorepository.dlsu.edu.ph/etd_masteral/2493