Title

Simulator/assembler for the MIPS64 architecture (SAM64)

Date of Publication

2005

Document Type

Bachelor's Thesis

Degree Name

Bachelor of Science in Computer Science

Subject Categories

Computer Sciences

College

College of Computer Studies

Department/Unit

Computer Science

Thesis Adviser

Roger Luis T. Uy

Defense Panel Member

Gregory Cu

Alexis Pantola

Karlo Shane Campos

Abstract/Summary

Simulator/Assembler for MIPS64 (SAM64) Architecture is a comprehensive pipeline and datapath simulator for the MIPS64 Architecture as illustrated in the books Computer Architecture - A Quantitative Approach and Computer Organization and Design , both by Hennessy and Patterson. It is a Windows-based program with a built-in text editor used as an instruction tool designed to aid Computer Architecture students in understanding and visualizing the concepts of pipelining. It is capable of simulating the pipeline algorithm of a MIPS64 assembly code and the data flow inside the datapath. It supports the two pipeline scheduling techniques, namely, static and dynamic, by implementing it either by executing all instructions at once (single-pass) or executing an instruction at a time (step-by-step), with an option of backtracking to a previous instruction. It is able to detect pipeline hazards and infinite loops, and implement control hazard solutions and exception handling. It also supports an assembler that can assemble all instructions in the MIPS64 architecture, including the 150 integer instructions and 79 floating-point instructions.

Abstract Format

html

Note

Vol. 2 is Technical manual.

Language

English

Format

Print

Accession Number

TU13611

Shelf Location

Archives, The Learning Commons, 12F, Henry Sy Sr. Hall

Physical Description

2 v. : ill. (some col.) ; 28 cm.

Keywords

Assembler language (Computer program language); Computer architecture

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